Computation Engineering Companies

This page lists all companies worldwide that offer careers in computation engineering (most are ASIC design companies). I try to keep the list up to date with new companies as well as those that get acquired or cease operations. 

  1. 1.Axelera AIMulti-core in-memory computing (SRAM) for low-precision edge execution
  2. 2.Biren TechnologyChinese datacenter GPUs target large-model acceleration under domestic supply constraints
  3. 3.BlaizeGraph Streaming Processor executes multimodal edge inference with programmable dataflow
  4. 4.BrainChipUltra-low-power neuromorphic processors that mimic the human brain
  5. 5.CambriconMLU accelerators expose proprietary ISA for Chinese server inference deployments
  6. 6.CerebrasWafer-scale logic-memory integration eliminating traditional interconnect fabrication bottlenecks
  7. 7.ChipAgentsMulti-agent LLM systems automating physical design and RTL verification
  8. 8.d-MatrixIn-memory computing optimizing Transformer-level KV-cache arithmetic intensity
  9. 9.DEEPXLow-power NPUs target robotics, cameras, factories, and automotive edge intelligence
  10. 10.EdgeCortixDynamic reconfigurable dataflow architectures maximizing compute-to-power efficiency
  11. 11.EnCharge AICharge-domain analog in-memory compute reduces transformer energy and bandwidth bottlenecks
  12. 12.EnflameCloudBlazer accelerators pursue scalable training and inference for Chinese clouds
  13. 13.EriduHigh-throughput network switches resolving cluster-level interconnect and data-path bottlenecks
  14. 14.EtchedHardwired, single-purpose ASICs exclusively for Transformers
  15. 15.ExpederaConfigurable NPU IP delivers area-efficient inference blocks for SoC integration
  16. 16.FractileInterleaved memory-compute architecture targets high-throughput, low-latency model inference workloads
  17. 17.FuriosaAIHigh-bandwidth memory combined with spatial dataflow architectures for inference
  18. 18.GraphcoreMassively parallel Intelligence Processing Units (IPUs) using fine-grained MIMD execution
  19. 19.GroqFully deterministic, software-scheduled SRAM execution engines eliminating runtime jitter
  20. 20.HailoStructure-driven stream processors utilizing hardware-native deep learning routing fabric
  21. 21.Huawei / HiSiliconAscend NPUs use Da Vinci cores across domestic AI stacks
  22. 22.HygonDCU accelerators adapt GPU-derived compute for Chinese datacenter deployments
  23. 23.Iluvatar CoreXTianshu GPUs emphasize CUDA-like migration for Chinese training workloads
  24. 24.KinaraPolymorphic dataflow architectures minimizing spatial latency for neural network execution
  25. 25.KneronReconfigurable edge NPUs support private vision inference and model portability
  26. 26.MatXLLM-specialized accelerators target hyperscale training efficiency through TPU-derived engineering design
  27. 27.MemryXAt-memory dataflow accelerator streams models without heavy external DRAM dependence
  28. 28.MetaXDomestic GPU alternatives target training and inference for Chinese infrastructure
  29. 29.MicrosoftMaia ASICs optimize Azure inference with rack-scale power-aware system design
  30. 30.Moore ThreadsMTT GPUs combine graphics heritage with AI acceleration compatibility layers
  31. 31.MythicAnalog compute-in-memory arrays store weights locally for efficient edge inference
  32. 32.Neuchips accelerates sparse recommendation and embedding-heavy inference workloads
  33. 33.NeuRealityNative hardware acceleration of networking and inference pipeline infrastructure
  34. 34.NeurophosOptical tensor processing units employing metamaterial optical computing arrays
  35. 35.OlixScaling an SRAM-architecture integrated with photonics
  36. 36.QualcommHexagon NPUs deliver mobile, automotive, and edge inference in SoCs
  37. 37.QuadricUnified processor IP tightly pairing DSP vector operations with NPU acceleration
  38. 38.Rain AINeuromorphic processors exploit sparse spiking dynamics for low-power inference execution
  39. 39.RebellionsHigh-bandwidth domain-specific silicon targeting low-latency financial and LLM token generation
  40. 40.Ricursive IntelligenceRL-driven end-to-end macro placement and automated design closure tooling
  41. 41.RivosRISC-V datacenter SoCs combine open CPUs with tensor acceleration engines
  42. 42.SambaNova SystemsReconfigurable Dataflow Architectures (RDA) utilizing a decoupled memory-to-compute fabric
  43. 43.SiMa.aiHeterogeneous MLSoC bridging vision processing pipelines with low-power NPU engines
  44. 44.SyntiantUltra-low-power, sub-milliwatt neural decision processors running compute-in-memory architectures
  45. 45.TenstorrentScalable, open-source RISC-V compute cores paired with networked packet-switched NOCs
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