Computation Engineering Companies

This page lists all companies worldwide that operate in the field of what I call computation engineering (most are ASIC design companies). I try to keep the list up to date with new companies as well as those that get acquired or cease operations. 

Chinese domestic / sovereign GPU

  1. 1.Biren TechnologyChinese datacenter GPUs target large-model acceleration under domestic supply constraints
  2. 2.CambriconMLU accelerators expose proprietary ISA for Chinese server inference deployments
  3. 3.EnflameCloudBlazer accelerators pursue scalable training and inference for Chinese clouds
  4. 4.Huawei / HiSiliconAscend NPUs use Da Vinci cores across domestic AI stacks
  5. 5.HygonDCU accelerators adapt GPU-derived compute for Chinese datacenter deployments
  6. 6.Iluvatar CoreXTianshu GPUs emphasize CUDA-like migration for Chinese training workloads
  7. 7.MetaXDomestic GPU alternatives target training and inference for Chinese infrastructure
  8. 8.Moore ThreadsMTT GPUs combine graphics heritage with AI acceleration compatibility layers

Edge / ultra-low-power inference

  1. 9.HailoStructure-driven stream processors utilizing hardware-native deep learning routing fabric
  2. 10.DEEPXLow-power NPUs target robotics, cameras, factories, and automotive edge intelligence
  3. 11.KneronReconfigurable edge NPUs support private vision inference and model portability
  4. 12.SiMa.aiHeterogeneous MLSoC bridging vision processing pipelines with low-power NPU engines
  5. 13.SyntiantUltra-low-power, sub-milliwatt neural decision processors running compute-in-memory architectures
  6. 14.QualcommHexagon NPUs deliver mobile, automotive, and edge inference in SoCs

Dataflow & novel parallel architectures

  1. 15.GroqFully deterministic, software-scheduled SRAM execution engines eliminating runtime jitter
  2. 16.SambaNova SystemsReconfigurable Dataflow Architectures (RDA) utilizing a decoupled memory-to-compute fabric
  3. 17.EdgeCortixDynamic reconfigurable dataflow architectures maximizing compute-to-power efficiency
  4. 18.KinaraPolymorphic dataflow architectures minimizing spatial latency for neural network execution
  5. 19.BlaizeGraph Streaming Processor executes multimodal edge inference with programmable dataflow
  6. 20.FuriosaAIHigh-bandwidth memory combined with spatial dataflow architectures for inference
  7. 21.GraphcoreMassively parallel Intelligence Processing Units (IPUs) using fine-grained MIMD execution

In-memory & memory-centric compute

  1. 22.Axelera AIMulti-core in-memory computing (SRAM) for low-precision edge execution
  2. 23.d-MatrixIn-memory computing optimizing Transformer-level KV-cache arithmetic intensity
  3. 24.MemryXAt-memory dataflow accelerator streams models without heavy external DRAM dependence
  4. 25.FractileInterleaved memory-compute architecture targeting high-throughput, low-latency inference workloads
  5. 26.XCENACXL-connected computational memory controllers with embedded RISC-V cores

Analog & optical (exotic-physics) compute

  1. 27.EnCharge AICharge-domain analog in-memory compute reduces transformer energy and bandwidth bottlenecks
  2. 28.MythicAnalog compute-in-memory arrays store weights locally for efficient edge inference
  3. 29.NeurophosOptical tensor processing units employing metamaterial optical computing arrays

Model-hardwired / workload-specialized silicon

  1. 30.EtchedHardwired, single-purpose ASICs exclusively for Transformers
  2. 31.TaalasA platform for quickly turning any AI model into custom silicon, resulting in 1000x more efficiency
  3. 32.MatXLLM-specialized accelerators for hyperscale training efficiency through TPU-derived engineering design
  4. 33.RebellionsHigh-bandwidth domain-specific silicon targeting low-latency financial and LLM token generation
  5. 34.NeuchipsAccelerates sparse recommendation and embedding-heavy inference workloads

Neuromorphic / spiking

  1. 35.BrainChipUltra-low-power neuromorphic processors that mimic the human brain
  2. 36.Rain AINeuromorphic processors exploit sparse spiking dynamics for low-power inference execution

Licensable NPU IP

  1. 37.ExpederaConfigurable NPU IP delivers area-efficient inference blocks for SoC integration
  2. 38.QuadricUnified processor IP tightly pairing DSP vector operations with NPU acceleration

Open / RISC-V platforms

  1. 39.TenstorrentScalable, open-source RISC-V compute cores paired with networked packet-switched NOCs
  2. 40.RivosRISC-V datacenter SoCs combine open CPUs with tensor acceleration engines
  3. 41.Ahead ComputingGeneral-purpose CPUs, RISC-V cores that Modern AI-driven workloads demand

Interconnect & inference infrastructure

  1. 41.EriduHigh-throughput network switches resolving cluster-level interconnect and data-path bottlenecks
  2. 42.NeuRealityNative hardware acceleration of networking and inference pipeline infrastructure

AI-for-chip-design tooling

  1. 43.ChipAgentsMulti-agent LLM systems automating physical design and RTL verification
  2. 44.Ricursive IntelligenceRL-driven end-to-end macro placement and automated design closure tooling

AI compiler / runtime platform

  1. 45.ModularMojo language and MAX engine unify model deployment across CPUs, GPUs, and accelerators

Wafer-scale integration

  1. 46.CerebrasWafer-scale logic-memory integration eliminating traditional interconnect fabrication bottlenecks

Hyperscaler in-house ASIC

  1. 47.MicrosoftMaia ASICs optimize Azure inference with rack-scale power-aware system design
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